1. Field of the Invention
The present invention relates to an electro-luminescence display, and more particularly to an electro-luminescence display that is adaptive for reducing its manufacturing cost as well as reducing its process time.
2. Description of the Related Art
Recently, there have been highlighted various flat panel display devices reduced in weight and bulk that is capable of eliminating disadvantages of a cathode ray tube (CRT). Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL) display, etc.
The EL display in such display devices is a self-luminous device capable of light-emitting a phosphorous material by a re-combination of electrons with holes. The EL display device is generally classified into an inorganic EL device using the phosphorous material as an inorganic compound and an organic using it as an organic compound. Such an EL display device has an advantage the its response speed is as fast as the cathode ray tube CRT when compared with a passive luminous device that requires a separate light source like that liquid crystal display. The EL display device also has many advantages of a low voltage driving, a self-luminescence, a thin-thickness, a wide viewing angle, a fast response speed and a high contrast, etc. such that it can be highlighted into a post-generation display device.
FIG. 1 is a sectional diagram illustrating a general organic EL structure for explanation of light emission principle of an EL display device. The organic EL includes an electron injection layer 4, an electron carrier layer 6, a light-emitting layer 8, a hole carrier layer 10, a hole injection layer 12 between a cathode 2 and an anode 14.
When a voltage is applied between the anode 14 of a transparent electrode and the cathode 2 of a metal electrode, an electron generated from the cathode 2 moves to the light-emitting layer 8 through the electron injection layer 4 and the electron carrier layer 6. Also, a hole generated from the anode 14 moves to the light-emitting layer 8 through the hole injection layer 12 and the hole carrier layer 10. Accordingly, the electrons are collided with the holes at the light-emitting layer 8, wherein the electrons and the holes are supplied from the electron carrier layer 6 and the hole carrier layer 10, and the electrons and the holes are recombined to generate light. The generated light is emitted through the anode 14 to display a picture. The light-emission brightness of the EL organic device is not proportional to the voltage flowing in both ends of the device, but it is proportional to a supply current, thus the anode 14 is usually connected to a static current source.
FIG. 2A is a diagram illustrating a general EL display device.
Referring to FIG. 2A, an EL display device includes an EL display panel 20 having EL cells 28 arranged at each intersection of scan electrode lines SL and data electrode lines DL, a scan driver 22 to drive the scan electrode lines SL, a data driver 24 to drive the data electrode lines DL, and a gamma voltage supplier 26 to supply reference gamma voltages to the data driver 24.
Each of the EL cells 28 is selected when a scan pulse is applied to the scan electrode line SL, which is a cathode, to generate a light corresponding to a pixel signal, i.e., data signal or current signal, supplied to the data electrode line DL, which is an anode. Each of the EL cells 28 operates substantially in the same manner as a diode connected between the data electrode line DL and the scan electrode line SL to be equivalent. Accordingly, each of the EL cells 28 supplies a negative scan pulse to the scan electrode line SL, and at the same time applies a positive current according to a data signal to the data electrode line DL, thereby emitting light when a forward voltage is applied. Differently from this, the EL cells 28 included in the unselected scan line do not emit light due to a reverse bias voltage.
The scan driver 22 sequentially supplies the negative scan pulse to a plurality of scan electrode lines SL.
The data driver 24 includes more than one data integrated circuit 30. As the EL display panel 20 becomes bigger, the number of data integrated circuits 30, which form the data driver 24, is larger. On the other hand, the data driver 24 might be composed of one data integrated circuit 30 as in FIG. 2B when the EL display panel 20 is made in a small panel like the display panel of a mobile phone.
In this way, the conventional EL display device supplies the current signal, which is proportional to an input data, to each of the EL cells 28 to make the EL cells 28 emit light, there by displaying a picture. EL cells 28 is composed of an R cell having a red (hereinafter, “R”) phosphorus, a G cell having a green (hereinafter, “G”) phosphorus, and a B cell having a blue (hereinafter, “B”) phosphorus, for materializing color.
Each of R, G, B phosphorus's has different efficiency from each other. In other words, the brightness level of R, G, B cells are different from each other in case that data signals of same level to R, G, B cells. Accordingly, the gamma voltages are set differently from each other by R, G, B in comparison with the same brightness in order to meet white balance. The gamma voltage supplier 26 generates a different reference gamma voltage by R, G, B.
FIG. 3 is a circuit diagram illustrating in detail a gamma voltage supplier 26 shown in FIGS. 2A and 2B.
Referring to FIG. 3, the prior art gamma voltage supplier 26 includes an R gamma voltage supplier 32, a G gamma voltage supplier 34, a B gamma voltage supplier 36 for supplying each of the different reference gamma voltages by R, G, B.
The R gamma voltage supplier 32 includes a divided voltage resistors r_R1, r_R2, r_R3 connected in series between a supply voltage source VDD and a ground voltage source GND. A divided voltage generated at nodes n1, n2 between the divided voltage resistors r_R1, r_R2, r_R3 is supplied to the data driver 24 as a reference gamma voltage. The voltage of the first node n1 is used as an R reference gamma voltage VH_R of low gray level, and the voltage of the second node n2 is used as an R reference gamma voltage VL_R of high gray level.
The G gamma voltage supplier 34 includes a divided voltage resistors r_G1, r_G2, r_G3 connected in series between a supply voltage source VDD and a ground voltage source GND. A divided voltage generated at nodes n3, n4 between the divided voltage resistors r_G1, r_G2, r_G3 is supplied to the data driver 24 as a reference gamma voltage. The voltage of the third node n3 is used as a G reference gamma voltage VH_G of low gray level, and the voltage of the fourth node n4 is used as a G reference gamma voltage VL_G of high gray level.
The B gamma voltage supplier 36 includes a divided voltage resistors r_B1, r_B2, r_B3 connected in series between a supply voltage source VDD and a ground voltage source GND. A divided voltage generated at nodes n5, n6 between the divided voltage resistors r_B1, r_B2, r_B3 is supplied to the data driver 24 as a reference gamma voltage. The voltage of the fifth node n5 is used as a G reference gamma voltage VH_B of low gray level, and the voltage of the sixth node n6 is used as a G reference gamma voltage VL_B of high gray level.
In other words, the prior art gamma voltage supplier 26 differently supplies the reference gamma voltage, which corresponds to each of the R cell, the G cell and the B cell, to the data driver 24. On the other hand, the gamma voltage supplier 26 includes a plurality of the R gamma voltage supplier 32, the G gamma voltage supplier 34, and the B gamma voltage supplier 36, as in FIG. 3, so that a light of different brightness could be generated in correspondence to an external environment. For example, the gamma voltage supplier 26 can includes three each of the the R gamma voltage supplier 32, the G gamma voltage supplier 34, and the B gamma voltage supplier 36 so that three modes of reference gamma voltage could be supplied in correspondence to night, day and the external environment. In this case, the number of total resistors included in the gamma voltage supplier 26 has to increase to 27.
The data integrated circuit 30 divides voltage as much as the gray levels, which are capable of expressing the reference gamma voltage supplied from the gamma voltage supplier 26, to generate an analog data which corresponds to each gray level. For this, the data integrated circuit 30 includes a shift register 40, a first latch array 42, a second latch array 44, a digital analog converter (hereinafter, referred to as “DAC”), and an output array 48.
The shift register 40 generates a sampling signal to sample data while shifting a start pulse in accordance with a shift clock.
The first latch array 42 includes a first R latch part 42a, a first G latch part 42b and a first B latch part 42C. The first R latch part 42a samples an R data in accordance with the sampling signal supplied from the shift register 40 and temporarily stores the R data. The first G latch part 42b samples a G data in accordance with the sampling signal supplied from the shift register 40 and temporarily stores the G data. The first B latch part 42C samples a B data in accordance with the sampling signal supplied from the shift register 40 and temporarily stores the B data.
The second latch array 44 supplies the data from the first latch array 42 to the DAC 46 in response to an output enable signal. For this, the second latch array 44 includes a second R latch part 44a, a second G latch part 44b and a second B latch part 44C. The second R latch part 44a supplies the data from the first R latch part 42a to the DAC 46 in response to the output enable signal. The second G latch part 44b supplies the data from the first G latch part 42b to the DAC 46 in response to the output enable signal. The second B latch part 44c supplies the data from the first B latch part 42c to the DAC 46 in response to the output enable signal.
The DAC 46 converts the data from the second latch array 44 into the analog data and outputs the converted data to the output array 48 in use of the reference gamma voltage VH_R, VL_R, VH_G, VL_G, VH_B, VL_B. For this, the DAC 46 includes an R DAC 46a, a G DAC 46b and a B DAC 46c. 
The R DAC 46a receives the R reference gamma voltage VH_R of low gray level and the R reference gamma voltage VL_R of high gray level from the gamma voltage supplier 26. And the R DAC 46a generates a plurality of gamma voltages in use of the R reference gamma voltage VH_R of low gray level and the R reference gamma voltage VL_R of high gray level. For example, the R DAC 46a generates sixty four analog gamma voltages assuming that there is a six bit input data. And the R DAC 46a selects the analog gamma voltage corresponding to the digital data from the second R latch part 44a as the analog data which is to be supplied to the data line DL.
The G DAC 46b receives the G reference gamma voltage VH_G of low gray level and the G reference gamma voltage VL_G of high gray level from the gamma voltage supplier 26. And the G DAC 46b generates a plurality of gamma voltages in use of the G reference gamma voltage VH_G of low gray level and the G reference gamma voltage VL_G of high gray level. For example, the G DAC 46b generates sixty four analog gamma voltages assuming that there is a six bit input data. And the G DAC 46b selects the analog gamma voltage corresponding to the digital data from the second G latch part 44b as the analog data which is to be supplied to the data line DL.
The B DAC 46c receives the B reference gamma voltage VH_B of low gray level and the B reference gamma voltage VL_B of high gray level from the gamma voltage supplier 26. And the B DAC 46C generates a plurality of gamma voltages in use of the B reference gamma voltage VH_B of low gray level and the B reference gamma voltage VL_B of high gray level. For example, the B DAC 46c generates sixty four analog gamma voltages assuming that there is a six bit input data. And the B DAC 46c selects the analog gamma voltage corresponding to the digital data from the second B latch part 44c as the analog data which is to be supplied to the data line DL.
The, output array 48 supplies the analog data supplied from the DAC 46 to the data electrode lines DL. For this, the output array 48 includes a first output part 48a, a second output part 48b, a third output part 48c. A first output part 48a supplies the analog data from the R DAC 46a to the data electrode lines DL which is for supplying data to the R cells. The second output part 48b supplies the analog data from the G DAC 46b to the data electrode lines DL which is for supplying data to the G cells. The third output part 48c supplies the analog data from the B DAC 46c to the data electrode lines DL which is for supplying data to the B cells.
As a result, the gamma voltage supplier 26 supplies the reference gamma voltages, which corresponds to the R cell, the G cell and the B cell and are different from each other, to the data driver 24, and the data driver 24 generates the data signal, which is to be supplied to the R cell, the G cell and the B cell in use of the different reference gamma voltage.
And yet, the prior art EL display device might have the brightness deviation generated between the EL display panels 20 by the deviation of manufacturing process. In other words, the brightness might be different in the same data in accordance with the EL display panel 20. In order to reduce such a brightness deviation, in the prior art, the resistance value of the resistors included in the gamma voltage supplier 26 is controlled to reduce the brightness deviation between the EL display panels 20. However, if the brightness deviation is compensated with the resistance value of the resistors, its process time is lengthened due to the adjustment time required for optimization of the resistance value or the replacement time of the resist, thus it is impossible to compensate the exact brightness deviation only by the adjustment of the resistance value.
The data integrated circuit 30 is mounted on a chip on film COF 50 as in FIG. 5, the resistors of the gamma voltage supplier 26 are mounted on a flexible printed circuit FPC 52 due to many resistors, which is difficult to be mounted on the COF 50. Because of many resistors of the gamma voltage supplier 26 like this, it is difficult to secure a margin in designing the FPC. Terminals of one side of the FPC 52 are connected to the COF 50 and terminals of the other side are connected to a printed circuit board PCB (not shown). Due to such FPC 52 and COF 50, there is a problem that the prior art EL display device has high manufacturing cost due to the FPC 52, and time is required for aligning the FPC 52 with the COF 50.